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                    • Reduced Prices
                      1. Home
                      2. Development Boards, Evaluation Tools
                      3. Debuggers, Emulators, JTAG Tools & Accessories
                      4. Debuggers, Emulators & JTAG Tools
                      Print Page

                      8.16.28

                      Emulator, The J-Link Ultra+, Automatic Core Recognition, JTAG Speeds up to 60MHz

                      SEGGER 8.16.28
                      SEGGER 8.16.28
                      SEGGER 8.16.28
                      SEGGER 8.16.28
                      Image is for illustrative purposes only. Please refer to product description.
                      ManufacturerSEGGER
                      Manufacturer Part No8.16.28
                      Order Code2364759
                      Technical Datasheet

                      Data Sheet

                      See all Technical Docs
                      34 In Stock

                      Need more?

                      1-3 Working Days Delivery
                      Order before 17:00 standard shipping
                      QuantityPrice (ex VAT)
                      1+kr 10,935.000
                      Price for:Each
                      Minimum: 1
                      Multiple: 1
                      kr 10,935.00 (ex VAT)
                      Enter Your Part No/Line Note
                      Added to your Order Confirmation, Invoice, and Dispatch note for this order only.
                      This number will be added to the Order Confirmation, Invoice, Dispatch note, Web confirmation Email and Product Label.

                      Product Information

                      ManufacturerSEGGER
                      Manufacturer Part No8.16.28
                      Order Code2364759
                      Technical Datasheet

                      Data Sheet

                      IC Product TypeDebugger Probe
                      Silicon Family Name-
                      Core ArchitectureARM
                      Core Sub-ArchitectureARM7/9/11, Cortex-A5/A8/A9/R4/M0/M0+/M1/M3/M4, Renesas RX
                      Kit ContentsJ-Link ULTRA+ with Standard 20-pin 0.1" Male Connector, 20-pin, 0.1" Target Ribbon Cable, USB Cable
                      FeaturesAutomatic Core Recognition, High Performance, Hi-Speed USB 2.0 Interface, JTAG Speed up to 60MHz
                      Product Range-
                      SVHCNo SVHC (14-Jun-2023)

                      Product Overview

                      The 8.16.28 J-LINK ULTRA+ is a JTAG/SWD emulator designed for ARM/Cortex and other supported CPUs. It is fully compatible to the standard J-Link and works with the same PC software. Based on the highly optimized and proven J-Link, it offers even higher speed as well as target power measurement capabilities due to the faster CPU, built-in FPGA and High speed USB interface. It connects via USB to a PC running Microsoft Windows 2000 or later. J-link ULTRA has a built-in 20-pin JTAG/SWD connector.

                      • High-speed USB 2.0 interface
                      • Debug interface (JTAG/SWD/...) speed up to 15MHz
                      • Download speed up to 3MBps
                      • Supports Serial Wire Debug (SWD) and Serial Wire Viewer (SWV)
                      • -5 to 60°C Operating temperature

                      Applications

                      Embedded Design & Development

                      Contents

                      J-Link ULTRA+ with Standard 20-pin 0.1" male connector, 20-pin, 0.1" Target ribbon cable, USB cable.

                      Technical Specifications

                      IC Product Type

                      Debugger Probe

                      Core Architecture

                      ARM

                      Kit Contents

                      J-Link ULTRA+ with Standard 20-pin 0.1" Male Connector, 20-pin, 0.1" Target Ribbon Cable, USB Cable

                      Product Range

                      -

                      Silicon Family Name

                      -

                      Core Sub-Architecture

                      ARM7/9/11, Cortex-A5/A8/A9/R4/M0/M0+/M1/M3/M4, Renesas RX

                      Features

                      Automatic Core Recognition, High Performance, Hi-Speed USB 2.0 Interface, JTAG Speed up to 60MHz

                      SVHC

                      No SVHC (14-Jun-2023)

                      Technical Docs (3)

                      Operating Instructions EN

                      Technical Data Sheet EN

                      element14 Technical Page EN

                      Associated Products

                      8 Products Found

                      Legislation and Environmental

                      Tariff No:84715000
                      US ECCN:EAR99
                      EU ECCN:NLR
                      RoHS Compliant:To be advised
                      RoHS Phthalates Compliant:To be advised
                      SVHC:No SVHC (14-Jun-2023)
                      Download Product Compliance Certificate

                      Product Compliance Certificate

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